NVIDIA Unveils Feynman GPU and Rosa CPU Roadmap for 2028

Post-Rubin Era Revealed at GTC Taipei 2026

During the NVIDIA GTC Taipei keynote on June 1, 2026, CEO Jensen Huang officially unveiled the company's roadmap for the post-Rubin era, signaling a strategic shift in both nomenclature and silicon architecture. NVIDIA introduced Feynman, the next-generation graphics processing unit (GPU) slated for release around 2028, alongside Rosa, a new data center central processing unit (CPU) designed to complement the AI factory stack ^[1]. This announcement solidifies NVIDIA's long-term trajectory against competitors and confirms aggressive adoption of Taiwan Semiconductor Manufacturing Company's (TSMC) most advanced process nodes.

Key Facts

• Feynman Architecture: Next-gen GPU targeting 2028 launch; utilizes TSMC A16 node with backside power delivery and 3D die stacking.
• Rosa CPU: Arm-based system-on-chip (SoC) honoring Rosalind Franklin; rumored 20-core design; replaces or evolves the Grace moniker.
• Naming Shift: NVIDIA moves from historical figures/artists to theoretical physicists and scientists for its compute lineup.
• Market Reaction: NVIDIA shares rose approximately 6.3% following the keynote as investors absorbed supply chain assurances and roadmap clarity.

Naming Convention Shifts to Scientific Pioneers

A notable cultural pivot occurred during the keynote as NVIDIA transitioned its naming convention. While past architectures honored artists and historical innovators, the Feynman and Rosa architectures signal a dedication to theoretical physics and scientific discovery. The "Rosa" designation explicitly honors Rosalind Franklin, whose pivotal work in DNA crystallography was instrumental in understanding biological structures. This thematic shift underscores NVIDIA's branding alignment with fundamental research and breakthrough innovation in the physical sciences.

Feynman: Tapping TSMC's 1.6nm Frontier

The technical specifications surrounding the Feynman GPU highlight a significant departure from standard industry scaling paths. Reports indicate that Feynman will leverage the TSMC A16 custom process node, a technology categorized as 1.6nm-class. This move effectively bypasses the standard 2nm generation for this product block, utilizing a unique variant optimized for extreme density ^[2].

To manage the thermal and electrical challenges of such high density, Feynman is expected to employ backside power delivery, often referred to as Super Power Rail technology. This technique routes power beneath the logic transistors rather than above, reducing resistance and allowing more area for computational units. Combined with heavy reliance on 3D die stacking techniques, Feynman aims to solve the "trillion-parameter model" inference wall that even the Vera Rubin architecture may struggle to address efficiently.

Additional features include integration with Custom High Bandwidth Memory (HBM) advancements and a new Low-Power Processor (LPU), identified as LP40. This LP40 LPU will likely handle background tasks and protocol processing, offloading the main tensor cores and improving overall efficiency per watt.

Rosa: The Arm-Based Core of the AI Factory

In tandem with Feynman, NVIDIA announced the Rosa data center CPU. Built on an Arm-based architecture, the Rosa SoC represents a continuation of NVIDIA's strategy to dominate data center workloads using energy-efficient RISC designs. Rumored specifications suggest a 20-core configuration, marking a potential evolution beyond the previous "Grace" lineage, potentially phasing out the Grace name in favor of this new scientific nomenclature.

The Rosa CPU is positioned as a critical component of NVIDIA's "full-stack" AI factory vision presented in Taipei. By tightly coupling Arm CPUs with custom GPUs, NVIDIA can optimize memory bandwidth and interconnect protocols like NVLink for specific large language model (LLM) training and inference patterns, maintaining a holistic advantage over x86-centric alternatives.

Market Reaction and Strategic Positioning

The market responded positively to the unveiling. NVIDIA stock increased by roughly 6.3% immediately after the June 1 keynote, driven by confirmed supply chain execution and expanded partnerships ^[4]. Notably, the company highlighted an expansion of its partnership with Foxconn, ensuring robust manufacturing capacity for the upcoming generations. Analysts view the Feynman and Rosa timeline as maintaining a multi-year generational lead over rivals such as Intel and AMD, particularly given the complexity of mastering backside power delivery and advanced packaging at scale.

Implications for Engineers and Investors

For developers and engineers, the Feynman architecture implies significant changes to the CUDA programming ecosystem. The introduction of the LP40 LPU and custom HBM interfaces will require updates to device code to exploit low-power offloading and optimized memory hierarchies. Users targeting trillion-parameter models should anticipate architectural improvements in inference throughput that may reduce time-to-resolution for deployment pipelines.

From an investment perspective, the roadmap reduces near-term uncertainty regarding node transitions. By skipping directly to a 1.6nm-class solution via TSMC A16, NVIDIA mitigates risks associated with intermediate node yields while asserting dominance in performance-per-watt. The confirmation of the Rosa CPU also reinforces the stability of the data center revenue stream, independent of discrete GPU cycles.

Conclusion

The revelation of Feynman and Rosa marks a definitive step into NVIDIA's future, moving beyond the current Rubin generation toward specialized, physics-inspired architectures. With deep integration of TSMC's cutting-edge A16 node, backside power delivery, and a renewed focus on full-stack coherence through the Arm-based Rosa CPU, NVIDIA is positioning itself to control the infrastructure requirements of the next wave of artificial intelligence. As production targets approach 2028, the industry will watch closely how these components integrate into the broader GPU ecosystem.